Location Palaiseau, Île-de-France
Job Type Stage
Posted June 04, 2026

Role Description

Position description

Category

Mathematics, information, scientific, software

Contract

Internship

Job title

Formal Investigation of Timing Anomalies and Memory Interference in Multicore WCET Analysis H/F

Subject

Critical automotive and avionics systems must guarantee that deadlines are always met, making timing analysis essential. Worst-Case Execution Time (WCET) analysis provides safe upper bounds on program execution but becomes challenging on multicore platforms due to timing anomalies and memory interferences from shared resources. This work studies how processor design and memory interference interact with these anomalies using formal hardware–software modeling, aiming to obtain provable timing guarantees and sound WCET methods.

Contract duration (months)

6

Job description

Critical ...

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