Senior Analog Layout Engineer – 3nm/5nm SoCs (Onsite)

A leading technology design company in Ottawa is seeking an experienced Analog Layout Engineer to execute layouts for advanced 3nm/5nm analog IPs. The ideal candidate will have over 5 years of experience with analog/mixed-signal layouts and proficiency in Cadence Virtuoso tools. Join a collaborative team focused on innovative solutions with opportunities for career growth and competitive compensation.
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