Sr Engineer/Layout Engineer, Memory CAD, Guadalajara

Micron Technology, Inc • tlaquepaque, Mexico

Location tlaquepaque, tlaquepaque
Job Type Full-time
Posted June 04, 2026

Role Description

JR Sr Engineer/Layout Engineer, Memory CAD, Guadalajara

CAD Engineer4

Relocation Level:TBD

Responsibilities
  • Develop, maintain, and support CAD software for product and process development.
  • Build and validate P‑cells, utilities, and automation scripts for layout and verification tasks.
  • Design and support automation for physical design, verification, optimization, and tapeout workflows.
  • Collaborate with PI engineers and design teams to implement effective layout methodologies.
  • Apply understanding of CMOS process fundamentals and design rules in layout work.
Minimum Qualifications
  • Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering.
  • 5+ years of experience in Design Automation or analog layout.
  • Experience with SKILL, Python, or recent proven experience with C, C++, Java, Visual Basic, Perl, or Lisp.
  • Experience ...

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